1. Technical Field
The present invention relates in general to semiconductor devices and in particular to a semiconductor chip package and method for constructing a semiconductor chip package. Still more particularly, the present invention relates to a semiconductor chip package having one or more pads which can be configured as either signal, power, or ground and a method for making a semiconductor chip package having such configurable pads.
2. Description of the Related Art
Due to an ever-increasing demand for performance and miniaturization, semiconductor manufacturers are continually driven to produce smaller semiconductor devices. In order to reduce the size of semiconductor device packages, manufacturers have developed single and multichip modules (SCMs and MCMs) that efficiently house semiconductor chips having a large number of connections. A countervailing consideration in semiconductor device development is a desire to provide additional signal connections, particularly during the initial phases of product development and testing, in order to monitor or control the semiconductor chip. A larger substrate is often required to accommodate these additional signal connections. However, the cost of developing two different substrates--a larger substrate for use during development of a prototype semiconductor chip and a smaller substrate for use during production--is often greater than simply utilizing a larger substrate for both the development and production versions of the semiconductor device. Moreover, the two substrates may exhibit differing electrical characteristics, thereby making accurate prediction of the performance of the production substrate difficult.
One compromise between the conflicting design considerations described above is represented by Ackerman et al., U.S. Pat. No. 4,975,765, "Highly Integrated Circuit and Method for the Production Thereof." Ackerman et al. disclose a semiconductor chip attached to a substrate having an edge that projects beyond the semiconductor chip on all sides. Signal connections required for full dynamic testing of the semiconductor chip are provided within the projecting substrate edge. Following testing of the semiconductor chip, the projecting edge of the substrate is trimmed off, resulting in a smaller substrate and therefore a smaller device package. Although providing a smaller substrate, the semiconductor chip package disclosed by Ackerman et al. does not enable further debugging or testing to be performed following the removal of the additional signal connections. Such testing is often helpful in failure analysis of defective devices returned by customers. Additionally, the utilization of different substrate sizes during the development/testing and production of a semiconductor device often changes the noise and performance characteristics of the semiconductor device, making it difficult to extrapolate the results of device testing and debugging to production devices. Furthermore, although a semiconductor substrate like that disclosed by Ackerman et al. could be employed to build a smaller semiconductor device, the manufacturer (and consequently the customer) still incurs the cost of the discarded portion of the larger substrate.
As should thus be apparent, a substrate design for a semiconductor chip package is needed which provides the signal connections necessary for testing and failure analysis and which enables a smaller substrate to be utilized during both product development and production.